Fixture Delay Calibration IP

Fixture Delay Calibration IP is an algorithm IP that compensates the signal transmission path delay within the test fixture.

CX1000 has calibrated the timing phase of [Timing A/Timing B] and [Judge Timing] at end of FUNC cable. This causes a timing phase difference due to the delay of the signal transmission path within the test fixture. Fixture Delay Calibration IP compensates the timing phase by canceling the delay of signal transmission path within the test fixture.

It is recommended to use this IP to compensate for the delay of the signal transmission path within the test fixture in the following cases.

  • When delay time of the signal transmission path cannot be ignored as the test specification.
  • When it is necessary to lengthen the signal transmission path within the test fixture for particular environment.

Features

Fixture Delay Calibration IP has the following features,

  • Can calibrate the timing phase of [Timing A/Timing B] and [Judge Timing] in accordance with delay time of the signal transmission path of the test fixture.
  • Calibration range is from 0ns to 10ns.
  • Time resolution of calibration is 250ps.
  • Can specify the individual values for each I/O channel.
  • Target I/O channel is selectable.
  • Fixture Delay Data File created by PCXA01-M1038 Fixture Delay Measurement IP is readable.

Add to Cart

Product GroupAlgorithm IP
CodePCXA01-M1037
Link
ManufacturerADVANTEST CORPORATION
Applicable Equipment
  • CX1000P CX1000_MCU
  • CX1000D CX1000_MCU
  • CX1000D S2-LINK CX1000_MCU
  • CX1000P MEMORY_TYPE_F
  • CX1000D MEMORY_TYPE_F
Fixture Delay Measurement IP

Revisions

Released atNumberDescription
August 21, 20201.02.02
  • Changed the company name and the logo in the manual.
August 28, 20191.02.00
  • Added the function to automatically exclude slave channels from calibration when using Pin Multiplex function.
August 17, 20161.01.00
  • Fixed the issue which displays the name other than I/O Pin.
September 30, 20151.00.00

First edition